Review our open positions. Either you’re interested in being a single contributor or a front line leader let us know what roles you want to take on as you would develop your career at CHIPAHEAD.
CAREERS
Career level:
Senior (G4) and above (G5-G6)
Your role:
• Module / Sub-system Verification Strategy and Verification plan development from specifications and/or standards
• Development of verification environment (VE) and verification components (VC) in UVM SV
• Writing tests, sequences, functional coverage, assertions and mapping these to the verification plan
• Functional verification of the design, debug and verification closure / sign-off
• Develop detailed test plans and write tests, run regressions, collect coverage matrices and report progress
• Develop highly automated environments to run regressions that can be used to make builds and maintain the sanity of the database
• Drive/participate in continuous improvement methodologies for SoC verification acceleration
Career path:
• According to your experience and willingness to develop your career you will lead teams from time to time and, we will support you to develop towards a technical managerial role
Education:
• University degree in Electronics Engineering, Computer Science or similar. Graduates with a Physics or Mathematics degree are welcome to apply
Previous experience:
• Experience with complex standards such as Ethernet, PCIe, or USB
• Experience with Cadence/Synopsys/Mentor simulators
• Deep understating of RTL, allowing efficient debugging when verifying, with particular emphasis DUTs populated with multiple CPU/MCU
• Experience with RISC-V and ARM processors
• Experience with network-on-chip
• Exposure to multiple design flows, procedures and processes from working with leading chip manufacturers
• Scripting skills
• Chip design industry background would be a plus
Other:
• Mitigates risks and avoids problems before they arise through effective communication
• Able to manage competing priorities staying on top of milestones
• Take action and find creative solutions to technical problems
• Able to work well with others, understanding their points of view, and come up with creative solutions
• Curious making a conscious effort to explore, investigate, learn and share with others
• Understanding both your own emotions and the emotions of those around you
• Fluent in English
Career level:
Senior (G4) and above (G5-G6)
Your role:
• Module level RTL design
• IP and subsystem integration
• Concept and development of clocking / power management structures for SoC and subsystems with processors and/or DSP instantiations
• Architect systems with multiple clock domains / multiple power islands
• Handover to back-end and follow-up functional sign-off with verification team
• Document for multiple stakeholders: data sheet, application note, microarchitecture, etc..
• High-level architecture exploration using high-level languages
Career path:
• According to your experience and willingness to develop your career you will lead teams from time to time and, we will support you to develop towards a technical managerial role
Education:
• University degree in Electronics Engineering, Computer Science or similar. Graduates with a Physics or Mathematics degree are welcome to apply
Previous experience:
• Experience with processors such as ARM or RISC-V and standards such as PCIe, or USB
• Experience with Cadence/Synopsys/Mentor simulators having participated in debug sessions in close co-op with verification team
• Deep understating of design flows, from design entry level (text or schematic), through formal, equivalence checking, synthesis, STA and DFT (scan insertion)
• Experience with RISC-V and ARM processors
• Experience with network-on-chip is a plus
• Exposure to multiple design flows, procedures and processes from working with leading chip manufacturers
• Scripting skills
• Chip design industry background with an history of tapeouts would be a plus
Other:
• Mitigates risks and avoids problems before they arise through effective communication
• Able to manage competing priorities staying on top of milestones
• Take action and find creative solutions to technical problems
• Able to work well with others, understanding their points of view, and come up with creative solutions
• Curious making a conscious effort to explore, investigate, learn and share with others
• Understanding both your own emotions and the emotions of those around you
• Fluent in English
Career level:
Graduates (G2), intermediate (G3), senior (G4) and above (G5-G6)
Your role:
• Create real-numbered analog behavioral models in SystemVerilog or other language for mixed signal verification
• Liaise with other functional areas such as Functional Verification, and SoC architecture to define, develop and calibrate models
• Create out-of-the-box testbenches allowing integrators to quickly reuse models
• Document models by writing datasheets and application notes aligned with out of the box testbenches
• Contribute to definition and improvement of methodologies for analog modeling focusing on SoC verification acceleration
• Responsible for support and maintenance of a set of models in the portfolio
• Drive/participate in continuous improvement methodologies for analog modeling and mixed-signal verification acceleration
Career path:
• According to your experience and willingness to develop your career you will lead teams from time to time and, we will support you to develop towards a technical managerial role
Education:
• University degree in Electronics Engineering, Computer Science or similar. Graduates with a Physics or Mathematics degree are welcome to apply
Previous experience for intermediates and seniors:
• Experience with any of the following: Spice, PSpice, VHDL/VHDL-AMS, Verilog-A/Verilog-AMS, SystemVerilog
• Experience with Cadence/Synopsys/Mentor simulators, e.g. Spectre or AMS Designer, as well as Matlab/Simulink
• Experience with Cadence schematic entry tools and netlister
• Experience with digital simulators such as NCSim
• Previous experience with analog-mixed-signal SoCs and subsystems
• Scripting skills
• Understanding of analog-mixed-signal design flows
• Analog circuit design background would be a plus
Other:
• Mitigates risks and avoids problems before they arise through effective communication
• Able to manage competing priorities staying on top of milestones
• Take action and find creative solutions to technical problems
• Able to work well with others, understanding their points of view, and come up with creative solutions
• Curious making a conscious effort to explore, investigate, learn and share with others
• Understanding both your own emotions and the emotions of those around you
• Fluent in English
Career level:
Graduates (G2), intermediate (G3), senior (G4) and above (G5-G6)
Your role:
• Create c/c++ code to run on a multitude of processors and/or DSPs
• Liaise with other functional areas such as Functional Verification, and SoC architecture to understand use cases required during verification, with goal to deliver firmware effective code
• Document code by delivering sections of verification plans and test plans
• Contribute to definition and improvement of methodologies and in particular automation
• According to seniority, participate in, or drive new automated processes, and respective implementation, in areas such as continuous integration, regression management and status reporting
Career path:
• According to your experience and willingness to develop your career you will lead teams from time to time and, we will support you to develop towards a technical managerial role
Education:
• University degree in Electronics Engineering, Computer Science or similar. Graduates with a Physics or Mathematics degree are welcome to apply
Previous experience for intermediates and seniors:
• Experience with any of the following: Spice, PSpice, VHDL/VHDL-AMS, Verilog-A/Verilog-AMS, SystemVerilog
• Experience with Cadence/Synopsys/Mentor simulators, e.g. Spectre or AMS Designer, as well as Matlab/Simulink
• Experience with Cadence schematic entry tools and netlister
• Experience with digital simulators such as NCSim
• Previous experience with analog-mixed-signal SoCs and subsystems
• Scripting skills
• Understanding of analog-mixed-signal design flows
• Analog circuit design background would be a plus
Other:
• Mitigates risks and avoids problems before they arise through effective communication
• Able to manage competing priorities staying on top of milestones
• Take action and find creative solutions to technical problems
• Able to work well with others, understanding their points of view, and come up with creative solutions
• Curious making a conscious effort to explore, investigate, learn and share with others
• Understanding both your own emotions and the emotions of those around you
• Fluent in English
So much internet, so little time, have you heard it? Through team work and dedication to your personal development you will quickly ramp in the development of real products interacting with an experienced international Team.
4 Things to explore:
Technology
Throughout your internship you will be in contact with processor technologies such as RISC-V or ARM and, FPGA technologies for emulation and prototyping. You will use Verilog to develop RTL for IP, subsystems and SoC level, creating systems for IoT applications. With SystemVerilog and C you will develop complex verification environments using methodologies such as constraint random. You will gain experience with major EDA tools from Synopsys, Cadence or Mentor.
Product Development
The combined complexity of multiple IP at the sub-system level can be huge and, already at this level, there are many seemingly independent activities that need to be closely correlated. Sub-system IP verification requires already the definition of complicated test scenarios as well as measuring how well we exercise such scenarios and corner cases. Sub-system IP will typically be deliver into SoC. Controlling SoC verification effort, to meet tight market windows requires pre-verified IP with sub-system IP being both an opportunity, if previously verified, and a challenge otherwise.
Agile Development
Great Teams develop great products that work and meet Customer needs. Great Teams are agile and self managed, sharing goals, responsibilities and mitigating risks daily. Agile development renews teamwork and puts emphasis of deliverables as opposed to the compartmentalization of disciplines. Planning and developing with iterations provide the opportunity to refine deliverables and design intent, all as a team.
A Rewarding Experience
Throughout your internship you will also be trained on a multitude of skills including effective communications with emphasis international team collaboration. Being a single contributor and standing for your beliefs, yet making sense of it all by listening and welcoming other views and promoting Team work at all times. Your internship will provide you with the quickest path to a successful start in the Semiconductor Industry.
Either you’re an experienced professional, a graduate or, you’re looking for an internship, let’s start our journey.
Simply contact us.
Either you’re considering a career change, you’re coming out from parental leave or sabbatical leave, you’re a young graduate starting a new career, or you are looking for an internship, let’s introduce each other. We still don’t need your curriculum vitae at this stage, but we will allocate time to meet you face to face.
If we got here we’re likely surprised with what we learnt about each other. Now is the time to show how it would be if we both decide to collaborate. Let’s solve together, hands-on on the whiteboard, a few engineering problems. Show it, don’t tell… we will do the same.
We are happy to pause our conversation at any stage to resume later. But we will make our best, second to none, to get here together.